VPI(PLI2.0)を使う
概要
- Verilogから他言語の呼び出し
- Verilogでは出来ないor難しいことをVPIで実装
- リファレンスモデル等、Verilog以外での実装が都合良いもの
参考資料
ソース
- 引数の数を数えて表示する
- "$count_args();"のとき、引数を0個とするか1個とするか、シミュレータによって差があるようだ。
count_args.c
#include "vpi_user.h"
#define NULL 0L
int count_args(){
vpiHandle thisTask, argI, argH;
int count = 0;
thisTask = vpi_handle(vpiSysTfCall, NULL);
if (vpi_chk_error(NULL)){
vpi_printf("ERROR: Could not get a handle to the task/func!\n");
return(0);
}
argI = vpi_iterate(vpiArgument, thisTask);
if (vpi_chk_error(NULL)){
vpi_printf("ERROR: Could not get iterator for task/func arguments!\n");
return(0);
}
if (!argI){
vpi_printf("There are 0 arguments to the system task.\n");
return(0);
}
/* Step throught args */
while (argH = vpi_scan(argI)){
vpi_free_object(argH);
count++;
}
vpi_printf("There are %i arguments to the system task.\n",count);
return(0);
}
vpi_user.c
シミュレータとのインターフェース、登録など
#include <stdio.h>
#include "vpi_user.h"
#ifdef NCVERILOG
#include "vpi_user_cds.h"
#endif
#ifdef CVER
#include "cv_vpi_user.h"
#endif
#define FALSE 0
#define TRUE 1
extern int count_args();
static s_vpi_systf_data systfTestList[] = {
{ /* Attribute */
vpiSysTask ,/* int type : vpiSysTask | vpiSysFunc */
0 ,/* int sysfunctype: vpiSysFuncInt|vpiSysFuncReal|vpiSysFuncTime|vpiSysFuncSise */
"$count_args",/* char *tfname : Function Name ="\$[A-Za-z0-9_]+" */
count_args ,/* int (*calltf) : (option) application routine */
0 ,/* int (*compiletf): (option) calls once each time it compiles an instance */
0 ,/* int (*sizetf) : (option) */
0 /* char *user_data : (option) */
},
{ 0 }
};
void setup_test_callbacks() {
p_vpi_systf_data systf_data_p = &(systfTestList[0]);
while(systf_data_p->type){
vpi_register_systf(systf_data_p++);
if (vpi_chk_error(NULL)){
vpi_printf("Error occured while setting up user %s\n",
"defined system tasks and functions.");
return;
}
}
}
void (*vlog_startup_routines[])() = {
setup_test_callbacks,/* */
0 /* final entry must be 0 */
};
#ifdef CVER
void vpi_compat_bootstrap(void){
int i;
for (i = 0;; i++){
if (vlog_startup_routines[i] == NULL) break;
vlog_startup_routines[i]();
}
}
#endif
テストベンチ
test.v
module top(I1);
input I1;
reg a;
integer int;
real r1;
time t1 [31:0];
initial begin
$count_args(a, int, r1, t1);
$count_args();
$count_args;
$count_args(a);
end
endmodule実行方法
Cver
gcc -g -I(gplcver-2.12aの場所)/pli_incs -c vpi_user.c count_args.c -DCVER
gcc count_args.o vpi_user.o -shared --export-dynamic -o vpi.so
cver +loadvpi=./vpi.so:vpi_compat_bootstrap test.v
実行結果。
solaris(SPARC)は失敗する･･･。
%> cver test.v +loadvpi=./vpi.so:vpi_compat_bootstrap
GPLCVER_2.12a of 05/16/07 (Sparc-Solaris).
Copyright (c) 1991-2007 Pragmatic C Software Corp.
All Rights reserved. Licensed under the GNU General Public License (GPL).
See the 'COPYING' file for details. NO WARRANTY provided.
Today is Wed Nov 26 16:33:23 2008.
**ERROR** [1803] unable to load +loadvpi= dynamic library: ld.so.1: cver: 重大なエラー: 再配置エラー: ファイル ./vpi.so: シンボル vpi_handle: 参照シンボルが見つかりません。
Compiling source file "test.v"
**test.v(12) ERROR** [1083] task enable of unknown system task or undefined PLI task "$count_args"
**test.v(13) ERROR** [1083] task enable of unknown system task or undefined PLI task "$count_args"
**test.v(14) ERROR** [1083] task enable of unknown system task or undefined PLI task "$count_args"
**test.v(15) ERROR** [1083] task enable of unknown system task or undefined PLI task "$count_args"
**test.v(16) ERROR** [1061] statement structure end bracket problem - end read
Unable to begin simulation.
There were 6 error(s), 0 warning(s), and 0 inform(s).
End of GPLCVER_2.12a at Wed Nov 26 16:33:23 2008 (elapsed 0.0 seconds).
%>
linux(80386)は成功する。
Warningがでている。Cverは引数が無い場合に括弧あると、文句をいうようだ。
GPLCVER_2.12a of 05/16/07 (Linux-elf).
Copyright (c) 1991-2007 Pragmatic C Software Corp.
All Rights reserved. Licensed under the GNU General Public License (GPL).
See the 'COPYING' file for details. NO WARRANTY provided.
Today is Wed Nov 26 17:10:08 2008.
Compiling source file "test.v"
Highest level modules:
top
**test.v(11) WARN** [633] system task enable: $count_args(); has one empty argument - for no arguments omit the ()
There are 4 arguments to the system task.
There are 1 arguments to the system task.
There are 0 arguments to the system task.
There are 1 arguments to the system task.
0 simulation events and 0 declarative immediate assigns processed.
4 behavioral statements executed (1 procedural suspends).
Times (in sec.): Translate 0.1, load/optimize 0.1, simulation 0.1.
There were 0 error(s), 7 warning(s), and 7 inform(s).
End of GPLCVER_2.12a at Wed Nov 26 17:10:08 2008 (elapsed 0.2 seconds).
NC-Verilog
gcc -c -g -I$CDS_INST_DIR/tools/include count_args.c vpi_user.c -DNCVERILOG
gcc count_args.o vpi_user.o -shared --export-dynamic -o vpi.so
ncverilog +loadvpi=./vpi:setup_test_callbacks test.v
実行結果。
ncverilog: 06.11-s004: (c) Copyright 1995-2007 Cadence Design Systems, Inc.
file: test.v
module worklib.top:v
errors: 0, warnings: 0
Caching library 'worklib' ....... Done
Elaborating the design hierarchy:
Building instance overlay tables: .................... Done
Generating native compiled code:
worklib.top:v <0x095a53b5>
streams: 1, words: 124
Loading native compiled code: .................... Done
Building instance specific data structures.
Design hierarchy summary:
Instances Unique
Modules: 1 1
Registers: 4 4
Initial blocks: 1 1
Writing initial simulation snapshot: worklib.top:v
Loading snapshot worklib.top:v .................... Done
ncsim> source /usr2/cadence/simulator/IUS611_s004/tools/inca/files/ncsimrc
ncsim> run
There are 4 arguments to the system task.
There are 1 arguments to the system task.
There are 0 arguments to the system task.
There are 1 arguments to the system task.
ncsim: *W,RNQUIE: Simulation is complete.
ncsim> exit
VCS
vcs -R -P count_args.tab count_args.c test.v +vpi -CFLAGS "-I$VCS_HOME/linux/lib" -DNCVERILOG +cli
VCSの場合、tabファイルを使って呼び出します。vpi_user.c不要です。
count_args.tab
$count_args call=count_args
実行結果。
Chronologic VCS (TM)
Version Y-2006.06-SP1 -- Wed Nov 26 16:42:01 2008
Copyright (c) 1991-2006 by Synopsys Inc.
ALL RIGHTS RESERVED
This program is proprietary and confidential information of Synopsys Inc.
and may be used and disclosed only as authorized in a license agreement
controlling such use and disclosure.
***** Warning: ACC/CLI capabilities have been enabled for the entire design.
For faster performance enable module specific capability in pli.tab file
Parsing design file 'test.v'
Top Level Modules:
top
No TimeScale specified
Starting vcs inline pass...
1 module and 0 UDP read.
However, due to incremental compilation, no re-compilation is necessary.
make: *** Warning: File `filelist' has modification time in the future (2008-11-26 16:42:03 > 2008-11-26 16:42:02.143906)
../simv up to date
make: warning: Clock skew detected. Your build may be incomplete.
Chronologic VCS simulator copyright 1991-2005
Contains Synopsys proprietary information.
Compiler version Y-2006.06-SP1; Runtime version Y-2006.06-SP1; Nov 26 16:42 2008
There are 4 arguments to the system task.
There are 0 arguments to the system task.
There are 0 arguments to the system task.
There are 1 arguments to the system task.
V C S S i m u l a t i o n R e p o r t
Time: 0
CPU Time: 0.000 seconds; Data structure size: 0.0Mb
Wed Nov 26 16:42:02 2008
CPU time: .030 seconds to compile + .020 seconds to link + .040 seconds in simulation
ModelSim
まだ試してない
Veritak
まだ購入してない
メモ
最終更新：2008年11月27日 12:46
